1. Hardware interface introduction

PhenixPro DevKit V1.0 I/O distribution

PhenixPro DevKit V1.0 I/O distribution

PhenixPro DevKit V1.0 I/O distribution

PhenixPro DevKit V1.0 I/O distribution

PhenixPro DevKit V1.0 I/O distribution

1.1. GH connector pin sequence description

GH connector

The connectors used for PhenixPRO flight control, in addition to USB-TYPEA, MiniHDMI, Cameralink, TF socket, MircoUSB using the standard connector, the rest are used GH connector . The picture is a diagram of the GH connector,, the first foot on the left is defined as PIN1, all GH form interface on PhenixPRO are defined in this order.

1.2. POWER

Pin Definition Notes
1 VDD_5V 5V Power input,Imax 1A
2 VDD_5V 5V Power input,Imax 1A
3 Current Detect
4 Voltage Detect
5 GND
6 GND

1.3. JTAG

PhenixPRO provides JTAG debugging interface, using 7Pin GH connector, pin definition is as follows:

Pin Definition Notes
1 TMS
2 TDI
3 TDO
4 TCK
5 GND
6 VDD3V3
7 RST

1.4. IIC

PhenixPRO provides an IIC expansion interface, using 4Pin GH connector, the pin is defined as follows:

Pin Definition Notes
1 VDD_5V_OUT 5V Power Output
2 PS_IIC0_SCL 3.3V logic level
3 PS_IIC0_SDA 3.3V logic level
4 GND

1.5. SPI

PhenixPRO provides a SPI expansion interface, using 6Pin GH connector, the pin is defined as follows:

Pin Definition Notes
1 VDD_5V_OUT 5V Power Output
2 PS_SPI1_SCLK 3.3V logic level
3 PS_SPI1_MISO 3.3V logic level
4 PS_SPI1_MOSI 3.3V logic level
5 PS_SPI1_SS0 3.3V logic level
6 GND

1.6. Data Radio

PhenixPRO provides a data radio interface, using UART communication, 4Pin GH connector, pin is defined as follows:

Pin Definition Notes
1 VDD_5V_OUT 5V Power Output
2 UART_TX PL_Bank35_6N,3.3V logic level
3 UART_RX PL_Bank35_6P,3.3V logic level
4 GND

1.7. UART

PhenixPRO provides two UART expansion interfaces, using 4Pin GH connector, the pin is defined as follows:

UART1:

Pin Definition Notes
1 VDD_5V_OUT 5V Power Output
2 UART1_TX PL_Bank13_19N,3.3V logic level
3 UART1_RX PL_Bank13_19P,3.3V logic level
4 GND

UART2:

Pin Definition Notes
1 VDD_5V_OUT 5V Power Output
2 UART2_TX PL_Bank34_1N,3.3V logic level
3 UART2_RX PL_Bank34_1P,3.3V logic level
4 GND

1.8. CAN

PhenixPRO provides a CAN expansion interface, using 4Pin GH connector, the pin is defined as follows:

Pin Definition Notes
1 VDD_5V_OUT 5V Power Output
2 PS_CAN0_H
3 PS_CAN0_L
4 GND

1.9. GPS

PhenixPRO provides all the way GPS expansion interface, the interface uses the UART interface, while providing an IIC for external compass. The interface uses a 6Pin GH connector, the pin definition is as follows:

Pin Definition Notes
1 VDD_5V_OUT 5V Power Output
2 GPS_UART_TX PL_Bank35_10N,3.3V logic level
3 GPS_UART_RX PL_Bank35_10P,3.3V logic level
4 GPS_IIC_SCL PL_Bank35_9N,3.3V logic level
5 GPS_IIC_SDA PL_Bank35_9P,3.3V logic level
6 GND

1.10. PWM Electronic Governor

[PhenixPRO provides eight-way PWM form of electrical governor interface, unified use of 2.54mm pitch header. Each PWM pin is defined as follows:]

PWM

1.11.SBUS

PhenixPRO provides a SBUS input, a SBUS output interface, using 2.54mm pin spacing leads. Specific definitions are as follows:

SBUS

1.12.Console

PhenixPRO provides a console interface for printing program running information. The interface uses UART communication, the interface leads to two forms. One through the onboard serial to USB chip, through the form of MircoUSB leads, users can directly use USB to connect the computer. Another way through the GH connector, through the form of UART leads.

Pin Definition Notes
1 VDD_5V_OUT 5V Power Output
2 PS_UART1_TX 3.3V logic level
3 PS_UART1_RX 3.3V logic level
4 GND

1.13.BOOT mode configuration switch

PhenixPRO provides a switch for configuring the BOOTmode. Defined as follows:

Pin Definition Notes
1 MIO0 ON : LOW This pin Default ON
2 [BOOT_MODE[3]]
3 BOOT_MODE[1]
4 BOOT_MODE[2]
5 BOOT_MODE[0]
6 BOOT_MODE[4]

Specific configuration information see below, the board currently supports SD card to start.

boot mode setting

results matching ""

    No results matching ""